Fault diagnosis using LP-TPG for Random Logic circuits

The proposed Built-In Self-Diagnosis method (BISD) is based on the standard BIST architecture and can be integrated with recent, commercial DFT techniques, LP-TPG for in-field testing and in-field diagnostic data collection. To find maximum faults, structural diagnosis is used which does reveal the diagnostic information. A new low power test pattern generator using a linear feedback shift register (LFSR), called LP-TPG, is used instead normal TPG to reduce the average and peak power of a circuit during test. LP-TPG inserts intermediate patterns between the random patterns. The goal of having intermediate patterns is to reduce the transitional activities of primary inputs which eventually reduces the switching activities inside the circuit under test, and hence, power consumption. The random natures of the test patterns are kept intact. The area overhead of the additional components to the LFSR is negligible compared to the large circuit sizes.